Release in Q2 2025
RISC-V CPU Design: Out-of-Order Execution and Linux Boot
AdvancedMaster RISC-V processor design through hands-on projects and practical implementations.
Course Description
• Out-of-Order Execution
• Performance Counters
• Debugging and Profiling Tools
• Running OpenSBI
• Running Linux
• No MMIO Implementation
• Includes FPGA And ASIC Implementation Add-on
$ ...
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What's Included
- Lifetime access to course materials
- Project files and source code
- Certificate of completion