Our Courses
From basic architecture to advanced processor design, our comprehensive RISC-V courses will help you master processor development from the ground up.
Beginner Courses
RISC-V CPU Design Fundamentals
• Understanding the RISC-V ISA and its extensions • Base integer instruction set RV32IM • SystemVerilog basics and intermediate concepts • Writing and debugging assembly programs • Pipelining and instruction level parallelism • Running Coremark and Dhrystone benchmarks
RISC-V CPU Design Fundamentals Add-on: FPGA and ASIC Implementation
• FPGA Basics • 4-state simulation • FPGA Synthesis Flow • ASIC Basics • OpenRoad Synthesis Flow • ASAP7 7nm Implementation
Intermediate Courses
RISC-V CPU Design: Superscalar and Privileged Architecture
• Superscalar architecture implementation •RV64ICM Architecture • Advanced branch prediction methods • CSRs and Privileged Architecture • Performance Optimization Techniques • Memory Error Detection and Correction • Running UBoot
RISC-V CPU Design: DSP and Scalar VLIW Architecture
• DSP and Vector Unit Design • Scalar VLIW Architecture • RV64IMFD Architecture (floating-point) • Compiler Design for DSP and Scalar VLIW • Memory Error Detection and Correction • Includes FPGA And ASIC Implementation Add-on
Advanced Courses
RISC-V CPU Design: Out-of-Order Execution and Linux Boot
• Out-of-Order Execution • Performance Counters • Debugging and Profiling Tools • Running OpenSBI • Running Linux • No MMIO Implementation • Includes FPGA And ASIC Implementation Add-on
RISC-V CPU Design: Vector Extension
• Vector Extension • Vector Unit Design • Vector Load/Store Instructions • Memory Error Detection and Correction • Includes FPGA And ASIC Implementation Add-on
Master Courses
RISC-V CPU Design: System-on-Chip Design
• System-on-Chip Design • Memory Controller Design • Interconnect Design • Cache Coherence Protocols • Interrupt Controller Design • Debug and Performance Counters • RISC-V Hypervisor • OpenSBI and Linux Boot • MMIO Implementation • Includes FPGA And ASIC Implementation Add-on
RISC-V-Based AI Accelerator Design
• AI Accelerator Design • Vector Unit Design • Memory Controller Design • PyTorch to RISC-V Compiler design • Includes FPGA And ASIC Implementation Add-on