RISC-V CPU Design Fundamentals

RISC-V CPU Design Fundamentals

Beginner

Master RISC-V processor design through hands-on projects and practical implementations.

Course Description

• Understanding the RISC-V ISA and its extensions

• Base integer instruction set RV32IM

• SystemVerilog basics and intermediate concepts

• Writing and debugging assembly programs

• Pipelining and instruction level parallelism

• Running Coremark and Dhrystone benchmarks

Free

Available on youtube

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